IBM Power chips to get 'no-power' sleep mode

Its future server processors will get an additional sleep state that consumes almost no power

IBM is developing a new deep-sleep mode for its Power processors that will allow them to draw almost no power when they are idle, an IBM engineer said at the Hot Chips conference on Monday.

IBM's Power7 chips already have three sleep modes that it calls nap, sleep and heavy sleep, and which are implemented based on factors such as the type of workload being run and how much latency an application can tolerate before the processor comes back to life.

Latency is a trade-off with each sleep state. The nap mode cuts the voltage to a processor core by 15 percent and can bring it back to life almost immediately. Heavy sleep mode cuts the power to all eight cores by 85 percent, but requires 2 milliseconds to bring the chip back to life.

The new deep-sleep mode will cut power to the processor almost entirely, but it will also take considerably longer -- 10 to 20 milliseconds -- to wake up again, Michael Floyd, an IBM engineer, said in a presentation at the conference in Stanford, California, on Monday.

IBM has code-named the new deep-sleep mode "Winkle," presumably after the storybook figure Rip van Winkle, who fell asleep for 20 years and awoke to find a changed world around him.

Floyd didn't say which chips will get the new sleep state or provide other details -- he called it "a little teaser for future chips." IBM could introduce it with an update to its existing Power 7 processors or wait for the Power8 line, which isn't expected for some time.

Sleep modes are a common way for chip makers to minimize the power consumed by their chips. Intel has said that individual cores on its Xeon 5600 processors can be powered down almost completely when they are idle.

Energy use on IBM's Power processor is managed by a dedicated, off-chip microcontroller that gathers data from 44 sensor points on each chip, as well as from other sensors in the system. It puts this data together to figure out the optimal voltage and clock speed for a processor at any given time, Floyd said.

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