What's next for the x86?

The venerable Intel microprocessor architecture is entering its fourth decade. Is it time for a change?

It's impossible to look at the x86 family of microprocessors without wondering if, after three decades of dominance, the architecture might be running out of steam. Intel, naturally, says the x86 still has legs, while hastening to add that its battles with competing architectures are far from over.

Justin Rattner, Intel's chief technology officer, cites the architecture's flexibility as a key to both its past and future success. Although people often refer to the x86 instruction set as though it were some kind of immutable specification, he says, both the instruction set itself and the architecture that implements it have gone through tremendous evolution over the years.

For example, he elaborates, the x86 beat back an assault in the 1990s from a raft of specialized media processors with its built-in MMX and SSE instruction set extensions, which greatly sped up the number-crunching needed for multimedia and communications applications. He also cites advancements that have been added to the chip and refined over the years, such as hardware support for memory management and virtualization.

Equally important, Rattner notes, is that Intel has maintained backward compatibility across the x86 family at each step of the evolution. Advances in the instruction set plus intra-family compatibility have enabled the x86 to span a very wide range of single-user and enterprise computers, from portables to supercomputers.

David Patterson, a computer science professor at the University of California, Berkeley, says, "It's important to understand that the x86 is not a frozen design. They have added about one instruction per month for 30 years. So they have something like 500 instructions in the x86 instruction set [now], and every generation they add 20 to 100 more. Backwards compatibility is sacrosanct, but adding new things for the future happens all the time."

A shift in strategies

Even without its application-specific advances, the performance improvements from the x86's long march to the tune of Moore's Law would have to put it among the more amazing of IT success stories. The 8086 that was introduced in 1978 worked at 10 MHz and had 29,000 transistors. A 3-GHz, quad-core Intel processor for desktops today is 300 times faster and has 820 million transistors -- a little less than 28,000 times as many -- in a slightly larger package and for a comparable cost.

"There have been tremendous technical challenges in continuing to shrink the size of transistors and other things, and Intel has invested tremendously in that," says Todd Mowry, a computer science professor at Carnegie Mellon University and an Intel research consultant. One of those challenges led to what Intel calls a "right-hand turn" at the company; heat became such a problem as circuits shrank that now performance advancements can come only from adding more processor cores to the chip, not from increasing the clock speed of the processor.

And that, in turn, has shifted the quest for performance from hardware to software, Mowry says. "In the research community now, the focus is not so much on how do we build one good core as much as on how do we harness lots of cores."

One of the most promising approaches today to exploiting the parallelism in multicore chips is the use of something called "software transactional memory," he says. That's a way to keep parallel threads from corrupting shared data without having to resort to locking, or blocking, access to that data. It's an algorithmic approach -- primarily a job for software -- but support for the technique can be built into the x86 hardware, he notes.

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Gary Anthes

Computerworld
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